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Job Description
Senior Staff Design Verification Engineer
47805BR
USA – California – California
Job Description and Requirements
Our Silicon Design & Verification business is all about building high-performance silicon chips-faster. We’re the world’s leading provider of solutions for designing and verifying advanced silicon chips. And we design the next-generation processes and models needed to manufacture those chips. We enable our customers to optimize chips for power, cost, and performance-eliminating months off their project schedules.
At Synopsys, we’re at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we’re powering it all with the world’s most advanced technologies for chip design and software security. If you share our passion for innovation, we want to meet you.
ASIC Design Verification Engineer, Senior Staff
Our DDR PHY IP team is Hiring a Staff level Digital ASIC Verification Engineer.
In this role you will be responsible for developing test benches and verifying integrated IP Subsystems for our global customers.
Qualifications:
- BSEE in EE with 7+ years of relevant experience or MSEE with 5+ years of relevant experience
- Experience in ASIC Verification at the SOC level and block level
- Exceptional Verilog, System Verilog and Perl/Python scripting skills
- Proficiency in UVM verification environment
- Solid Debugging skills
- Demonstrates good communication and problem-solving skills
- Understanding of high-speed interface protocols is a plus
The base salary range across the U.S. for this role is between $111,000 to $194,000. In addition, this role may be eligible for an annual bonus, equity, and other discretionary bonuses. Synopsys offers comprehensive health, wellness, and financial benefits as part of a of a competitive total rewards package. The actual compensation offered will be based on a number of job-related factors, including location, skills, experience, and education. Your recruiter can share more specific details on the total rewards package upon request.
Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability.
Job Category
Engineering
Country
United States
Job Subcategory
ASIC Digital Design
Hire Type
Employee
Base Salary Range
111,000 – 194,000
Synopsys maintains a workplace where all personnel, customers, and vendors are treated with dignity, fairness, and respect. We maintain worldwide policies in our Work Rules Policy, which is applicable to all employees in furtherance of these principles. We pride ourselves on providing a healthy and productive work environment that is free from discrimination and harassment based on race, color, religion, gender, gender identity, sexual orientation, marital status, veteran status, age, national origin, citizenship, ancestry, physical or mental disability, pregnancy, medical condition, and any other characteristic protected by law. For applicants and employees with disabilities, we also make reasonable accommodations consistent with applicable laws and regulations. We are each expected to do our part to create a healthy and productive work environment for everyone. This includes bringing issues to management’s attention when you believe certain conditions are distracting from a good work environment. Our Work Rules Policy also allows you to raise concerns with other Synopsys managers. If employees are still unable to resolve their concerns, their disputes may be resolved through our Internal Issue Resolution Process Policy. In addition, all managers and employees in positions of authority have a special obligation to maintain and support a healthy and productive work environment.
